Low-power high-performance SAR ADC with redundancy and digital background calibration
نویسنده
چکیده
There is a growing demand for low-power, high-speed and high-resolution A/D converters for applications such as wideband wired/wireless communication, software radio and millimeter-wave imaging systems. For many years, the successive-approximation-register (SAR) ADC has appeared mostly in the low-speed and low-power applications. The unprecedented improvement in speed and energy efficiency of scaled CMOS technologies helps expand the SAR architecture into Authors: A. H. Chang, H.-S. Lee, D. S. Boning Sponsorship: Masdar Institute of Science and Technology Category: Circuits & Systems, Medical Electronics Tags: albert chang, duane boning, hae-seung lee Print This Page Download as PDF Search report Go
منابع مشابه
Digital Calibration of SAR ADC
Four techniques for digital background calibration of SAR ADC are presented and compared. Sub-binary redundancy is the key to the realization of these techniques. Some experimental and simulation results are covered to support the effectiveness of these techniques. Keywords—SAR ADC, digital background calibration, DAC mismatch, bit weight, sub-binary redundancy
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